Bruce F. Cockburn completed a BSc degree in Engineering Physics in 1981 at Queen's University in Kingston, Ontario. In 1985 and 1990 he completed M Math and PhD degrees, respectively, in Computer Science at the University of Waterloo. His doctoral thesis considered the design and analysis of provably optimal test algorithms for classes of faults in semiconductor memories.
Dr. Cockburn is currently an Associate Professor in the Department of Electrical and Computer Engineering at the University of Alberta. From 1981 to 1983 he worked as a test engineer and software designer at Mitel Corporation, Kanata, Ontario, Canada. His research interests include VLSI design and test, parallel signal processing algorithms and architectures, applications of field-programmable gate arrays, iterative decoder architectures, MIMO decoder architectures, fading channel simulators, and other hardware blocks for accelerating communications system verification and performance measurement.
Dr. Cockburn is a member of the IEEE Computer Society, the IEEE Communications Society, the IEEE Solid-State Circuits Society, the IEEE Signal Processing Society, and the Association for Computing Machinery. He is a registered Professional Engineer in the Province of Alberta, Canada.
My research interests lie in a variety of areas in Computer Engineering, Communications, and Signal Processing. A general theme is the efficient hardware implementation of computationally-intensive algorithms. For example, the signal processing that must be performed within a cellular telephone requires computational resources that used to be considered the domain of supercomputers. It is a challenging problem to efficiently exploit modern semiconductor technology to ensure that all of the required computation is completed within strict time constraints. Ensuring the lowest possible energy consumption is also important since many modern communications devices are battery-powered.
My research group is currently investigating hardware-accelerated models of wireless fading channels and parallelizable decoders for wireless signals in multiple antenna systems. Wireless fading is the phenomenon that causes received wireless signals to vary rapidly in strength due to constructive and destructive interference between the many possible propagation paths between the transmitting antenna(s) and the receiving antenna(s). The conventional practice is to use wireless fading channel models implemented as software programs. Implementing those same channel models in hardware allows system simulation times to be reduced by several orders of magnitude. The resulting faster simulation times are permitting my group to more rapidly and effectively investigate new parallel hardware designs for the decoder circuits that are used to accurately decode the radio signals arriving at the receiver antenna(s).
Design and use of digital interfaces, including memory, serial, parallel, synchronous and asynchronous interfaces. Hardware implementations of interrupts, buses, input/output devices and direct memory access. Multitasking software architecture, real-time preemptive multitasking kernels. Data structures and mechanisms for flow control. Computer communications interfaces, interfacing of microcontroller to peripheral devices such as stepper motors. Requires payment of additional student instructional support fees. Refer to the Fees Payment Guide in the University Regulations and Information for Students section of the Calendar. Prerequisite: ECE 212 or E E 380 or CMPUT 229, and 275 or permission of the Instructor. Credit may be obtained in only one of CMPE 401 or ECE 315.Winter Term 2021
Review of classical logic design methods. Introduction to the hardware description language VHDL. Logic simulation principles. Digital system design. Digital system testing and design for testability. Arithmetic circuits. State-of-the-art computer-aided design tools and FPGAs are used to design and implement logic circuits. Corequisite: ECE 304 or E E 351. Credit may be obtained in only one of CMPE 480 or ECE 410.Fall Term 2020