Jie Han received his BSc degree in electronic engineering from Tsinghua University in 1999, and his PhD degree from Delft University of Technology in 2004. He was a NASA INAC (Institute for Nanoelectronics and Computing) Postdoctoral Fellow in the Department of Electrical and Computer Engineering at the University of Florida from 2004 to 2007. From 2007 to 2009, he worked as a Research Scientist at the Advanced Medical Diagnostics SA/BV in Belgium.
Dr. Han was named in the “Milestones of Science” for 2003 by the 125th anniversary issue of Science (July 1, 2005, Vol. 309, No. 5731), for developing theory of fault-tolerant nanocircuits. He was nominated for the 2006 Christiaan Huygens Price of Science by the Royal Dutch Academy of Science (Koninklijke Nederlandse Akademie van Wetenschappen (KNAW) Christiaan Huygens Wetenschapsprijs). He is a member of the Institute of Electrical and Electronics Engineers (IEEE), the Association for Computing Machinery (ACM), and the American Society for Engineering Education (ASEE).
With the scaling of CMOS and emergence of other nanotechnologies, the random and statistical properties of devices start to challenge the traditional paradigm of deterministic computation. Circuits and systems built from nanoscale devices will have to deal with the inherent randomness and stochastic behaviour of the devices. To address these challenges, my research focuses on the design and modeling of probabilistic, energy-efficient and fault-tolerant circuits and systems based on nanoscale devices. It includes:
My current research focuses on the reliability, testing and modeling of probabilistic/stochastic networks in both nanoelectronic and biological applications. This includes:
Defects in manufacturing, failure mechanisms, and fault modeling. Reliability and availability theory. Static and dynamic redundancy and repair. Error correcting codes and self-checking systems. Roll-back strategies. Fault-tolerant computers and network architecture. Prerequisite: ECE 342. Credit may be obtained in only one of CMPE 425 or ECE 412.Winter Term 2021
Design of digital application-specific integrated circuits (ASICs) using synthesis CAD tools. Topics include design flow, hierarchical design, hardware description languages such as VHDL, synthesis, design verification, IC test, chip-scale synchronous design, field programmable gate arrays, mask programmable gate arrays, CMOS circuits and IC process technology. For the project, students will design and implement a significant digital system using field programmable gate arrays. Note: Only one of the following courses may be taken for credit: ECE 511 or E E 552.Fall Term 2020