MCTR 210 - Digital Logic Design and Microprocessors

3.5 units (fi 8)(SECOND, 3-0-1)

Faculty of Engineering

Number systems, logic gates, Boolean algebra. Karnaugh maps. Combinational networks. State machines. Field programmable gate array (FPGA) implementation. Computer architecture. Assembly language. Addressing modes, subroutines, memory, input-output interfacing, and interrupts.

No syllabi

Winter Term 2027

Lectures

Section Capacity Class times Login to view Instructor(s) and Location
LECTURE B1
(80864)
100
2027-01-04 - 2027-04-09 (TR)
14:00 - 15:20

Labs

Section Capacity Class times Login to view Instructor(s) and Location
LAB H21
(80866)
50
2027-01-04 - 2027-04-09 (T)
09:00 - 10:50
LAB H41
(80865)
50
2027-01-04 - 2027-04-09 (R)
09:00 - 10:50