Nan Jiang
Winter Term 2026 (1940)
MCTR 210 - Digital Logic Design and Microprocessors
3.5 units (fi 8)(SECOND, 3-0-1)
Number systems, logic gates, Boolean algebra. Karnaugh maps. Combinational networks. State machines. Field programmable gate array (FPGA) implementation. Computer architecture. Assembly language. Addressing modes, subroutines, memory, input-output interfacing, and interrupts.
LAB H41 (88128)
2026-01-05 - 2026-04-10
R 09:00 - 10:50
LAB H21 (88129)
2026-01-05 - 2026-04-10
T 09:00 - 10:50